The present invention relates generally to fast-settling precision voltage follower circuits for driving large capacitive loads, and more particularly to a fast-settling precision voltage follower circuit that is suitable for applying a reference voltage input to the back panel conductor of an LCD panel.
The back side conductor of an ordinary LCD panel should be maintained at an accurate, constant voltage since color and intensity of the image pixels are determined by the voltage between the back side conductor and any particular front pixel electrode. The capacitance of the back panel can be up to 15-20 nanofarads, depending on the panel size. However, if the LCD screen has capacitively coupled sensors on it which are used for touch sensing, the voltage between any particular front pixel electrode and the backside conductor must be rapidly switched to accommodate for different modes of sensing, while continuing to maintain the present image on the LCD screen, to avoid any visual effects or “artifacts” from being caused by the rapid switching. For example, the settling time for 5 volt steps in the front pixel electrode voltage (relative to the voltage of the back side conductor) with 1 millivolt accuracy should be less than approximately 2 picoseconds.
Referring to Prior Art FIG. 1, a conventional two-stage voltage follower amplifier 1 includes a differential input stage including P-channel input transistors MP1 and MP2 having their sources coupled to one terminal of a tail current source JO, the other terminal of which is connected to VDD. The gate of input transistor MP1 is connected by conductor 2 to receive an input voltage VIN. VIN typically is the output of a DAC, and when voltage follower amplifier 1 is used in an LCD display system, the signal is used as an input to the display driving circuitry (not shown). There may be large, very fast changes in the value of VIN, and in some applications the voltage follower amplifier needs to be able to respond very rapidly to such large, fast changes of VIN. For some LCD driver applications, the voltage follower needs to drive a very large capacitive load and nevertheless be able to cause the actual value of VOUT to settle very rapidly to within a millivolt of the desired “steady-state” value of VOUT.
In FIG. 1, the gate of input transistor MP2 is coupled to output conductor 9. The drain of input transistor MP1 is connected by conductor 3 to the junction between N-channel cascode transistor MN3 and N-channel transistor MN4. The drain of input transistor MP2 is connected by conductor 4 to the junction between N-channel cascode transistor MN1 and transistor MN2. The sources of transistors MN2 and MN4 are connected to VSS. The gates of cascode transistors MN1 and MN3 are connected to a voltage source V0. The gates of transistors MN2 and MN4 are connected by conductor 5 to the drain of transistor MN1 and to one terminal of current source I1, the other terminal of which is connected to VDD. The drain of cascode transistor MN3 is connected by conductor 8 to the gate of a N-channel pull-down transistor MN5, one terminal of a compensation capacitor C2, and one terminal of a conventional class AB output circuit.
The source of pull-down transistor MN5 is connected to VSS and its drain is connected by output conductor 9 to one terminal of a load capacitance CLOAD, the drain of a P-channel pull-up transistor MP5, the other terminal of capacitor C2, and one terminal of a compensation capacitor C1. The source of pull-up transistor MP5 is connected to VDD, and its gate is connected by conductor 6 to the other terminal of compensation capacitor C1, to the other terminal of class AB circuit 7, and to one terminal of a current source I2, the other terminal of which is connected to VDD.
Due to the highly capacitive load CLOAD, the basic high-speed capability of voltage follower amplifier 1 needs to be significantly reduced by compensation capacitance to keep it stable. Such compensation is achieved in two-stage voltage follower 1 by means of compensation capacitors C1 and C2. The capacitance of compensation capacitors C1 and C2 typically each may be roughly a few picofarads. In practice, compensation capacitors C1 and C2 should limit the bandwidth of voltage follower amplifier 1 to an amount below 100 kHz. That results in the output voltage VOUT of voltage follower amplifier 1 having a settling time in the range of roughly 30-40 picoseconds or less. Although the operating speed of a standard LCD driver is not an issue because its back panel voltage is constant, the conventional two-stage voltage follower amplifier architecture shown in Prior Art FIG. 1 can not provide the short settling times required for a capacitive touch screen application in which there would be very fast, large (e.g., 5 volt) transitions or “steps” of the input voltage VIN.
Various current gain boosted follower circuits are known in the art. One such current gain boosted follower circuit is disclosed as the output stage section 10C together with transistor MN7 in FIG. 2 of commonly assigned U.S. Pat. No. 7,633,280 “Low Dropout Voltage Regulator with Instant Load Regulation and Method” issued to Ivanov et al. on Dec. 15, 2009.
Thus, there is an unmet need for a very fast-settling precision voltage follower circuit and method.
There also is an unmet need for a precision voltage follower circuit and method capable of providing a very fast-settling output voltage while driving a very large capacitive load.
There also is an unmet need for circuitry and a method to provide very fast-settling of the output voltage of a precision voltage follower circuit without substantially increasing its power consumption.
There also is an unmet need for a very fast-settling precision voltage follower circuit and method capable of providing the fast mode switching operation needed for a back panel driver of a capacitive touch screen system.